Journals

1. Benton H. Calhoun, Yu Cao, Xin Li, Ken Mai, Lawrence T. Pileggi, Rob A. Rutenbar, and Kenneth L. Shepard.
   "Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS" (pdf).
   Proceedings of the IEEE (Special Issue on Integrated Electronics: Beyond Moore's Law), Vol. 96, No. 2, pages 343-365, February 2008.
   


2. Benton H. Calhoun and Anantha P. Chandrakasan.
   "A 256kb 65nm Sub-threshold SRAM Design for Ultra-Low Voltage Operation" (pdf).
   IEEE Journal of Solid-State Circuits, Vol. 42, No. 3, pages 680-688, March 2007.
   


3. Benton H. Calhoun and Anantha Chandrakasan.
   "Static Noise Margin Variation for Sub-threshold SRAM in 65nm CMOS."(pdf).
   IEEE Journal of Solid-State Circuits, Vol. 41, No. 7, pages 1673-1679, July, 2006.
   


4. Benton H. Calhoun and Anantha P. Chandrakasan.
   "Ultra-Dynamic Voltage Scaling (UDVS) Using Sub-Threshold Operation and Local Voltage Dithering"(pdf).
   IEEE Journal of Solid-State Circuits, Vol. 41, No. 1, pages 238-245, January, 2006.
   


5. Benton H. Calhoun, Alice Wang, and Anantha P. Chandrakasan.
   "Modeling and Sizing for Minimum Energy Operation in Subthreshold Circuits"(pdf).
   IEEE Journal of Solid-State Circuits, Vol. 40, No. 9, pages 1778-1786, September, 2005.
   


6. Benton H. Calhoun, Denis C. Daly, Naveen Verma, Daniel F. Finchelstein, David D. Wentzloff, Alice Wang, Seong-Hwan Cho, and Anantha P. Chandrakasan.
   "Design Considerations for Ultra-Low Energy Wireless Microsensor Nodes"(pdf).
   IEEE Transactions on Computers, Vol. 54, No. 6, pages 727-740, June, 2005.
   


7. Benton H. Calhoun and Anantha P. Chandrakasan.
   "Standby Power Reduction Using Dynamic Voltage Scaling and Canary Flip-Flop Structures"(pdf).
   IEEE Journal of Solid-State Circuits, Vol. 39, No. 9, September, 2004.
   


8. Benton H. Calhoun, Frank A. Honore, and Anantha Chandrakasan.
   "A Leakage Reduction Methodology for Distributed MTCMOS"(pdf).
   IEEE Journal of Solid-State Circuits, Vol. 39, No. 5, May, 2004.
   


9. Eugene Shih, Seonghwan Cho, Fred S. Lee, Benton H. Calhoun, and Anantha Chandrakasan.
   "Design Considerations for Energy-Efficient Radios in Wireless Microsensor Networks"(pdf)
   The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology, Vol. 37, Issue 1, Pages 77 - 94, May 2004.
   

Books

1. A. Wang, B.H. Calhoun, and A. Chandrakasan.
   Sub-threshold Design for Ultra Low-Power Systems | (buy the book) | (at Amazon.com)
   Springer, 2006.
   

Book Chapters

1. Benton H. Calhoun, James Kao, and Anantha Chandrakasan.
   "Power Gating and Dynamic Voltage Scaling."
   in Leakage in Nanometer CMOS Technologies.
   Siva G. Narendra and Anantha Chandrakasan, eds., pages 41-75, Springer, 2006.
   


2. B.H. Calhoun, C. Schurgers, A. Wang, and A. Chandrakasan.
   "Low Energy Digital Circuit Design."
   in AmIware: Hardware Drivers of Ambient Intelligence.
   S. Mukherjee, E. Aarts, R. Roovers, F. Widdershoven, and M. Ouwerkerk, eds., Springer, pages 181-202, 2006.
   

Conferences

1. Joseph F. Ryan and Benton H. Calhoun.
   "Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-threshold Operation"
   Accepted in the International Symposium on Quality Electronic Design, March 2008.
   


2. Amith Singhee, Jiajing Wang, Benton H. Calhoun, and Rob A. Rutenbar
   "Recursive Statistical Blockade: An Enhanced Technique for Rare Event Simulation with Application to SRAM Circuit Design"
   Accepted in the International Conference on VLSI Design, January 2008.
   


3. Jiajing Wang and Benton H. Calhoun
   "Canary Replica Feedback for Near-DRV Standby VDD Scaling in a 90nm SRAM" (pdf). | Slides (pdf)
   Custom Integrated Circuits Conference (CICC), pages 29-32, September 2007.
   


4. Jiajing Wang, Amith Singhee, Rob A. Rutenbar, and Benton H. Calhoun
   "Statistical Modeling for the Minimum Standby Supply Voltage of a Full SRAM Array" (pdf). | Slides (pdf)
   European Solid State Circuits Conference (ESSCIRC), pages 400-403, September 2007.
   


5. Alice Wang, Benton H. Calhoun, Naveen Verma, Joyce Kwong, and Anantha Chandrakasan
   "Ultra-Dynamic Voltage Scaling for Energy Starved Electronics"
   Proc. of GOMAC Tech, March 2007.
   


6. Joseph F. Ryan, Jiajing Wang, and Benton H. Calhoun
   "Analyzing and Modeling Process Balance for Sub-threshold Circuit Design" (pdf). | Slides (pdf)
   GLSVLSI, pp. 275-280, March 2007.
   


7. Benton H. Calhoun, Alice Wang, Naveen Verma, and Anantha Chandrakasan.
   "Sub-threshold Design: The Challenges of Minimizing Circuit Energy"(pdf). | Slides (pdf)
   International Symposium on Low Power Electronics and Design, pp. 366-368, October 2006.
   


8. Anantha P. Chandrakasan, Naveen Verma, Joyce Kwong, Denis Daly, Nathan Ickes, Daniel Finchelstein, and Benton H. Calhoun.
   "Micropower Wireless Sensors" (submission pdf).
   NSTI Nanotech, vol 3, pages 459-462, May 7-11, 2006.
   


9. Benton H. Calhoun and Anantha Chandrakasan.
   "A 256kb Sub-threshold SRAM in 65nm CMOS"(pdf). | Slides (pdf)
   IEEE International Solid-State Circuits Conference, pages 628-629, February 2006.
   


10. Benton H. Calhoun and Anantha Chandrakasan.
    "Analyzing Static Noise Margin for Sub-threshold SRAM in 65nm CMOS"(pdf). | Slides (pdf)
    European Solid-State Circuits Conference, pages 363-366, September 2005.
    


11. Benton H. Calhoun and Anantha Chandrakasan.
    "Ultra-Dynamic Voltage Scaling Using Sub-threshold Operation and Local Voltage Dithering in 90nm CMOS"(pdf). | Slides (pdf)
    IEEE International Solid-State Circuits Conference, pages 300-301, 599, February 2005.
    


12. Benton H. Calhoun, Alice Wang, and Anantha Chandrakasan.
    "Device Sizing for Minimum Energy Operation in Subthreshold Circuits"(pdf). | Slides (pdf)
    Custom Integrated Circuits Conference, October 2004.
    


13. Benton H. Calhoun and Anantha Chandrakasan.
    "Characterizing and Modeling Minimum Energy Operation for Subthreshold Circuits"(pdf). | Slides (pdf)
    International Symposium on Low Power Electronics and Design, August 2004.
    


14. David D. Wentzloff, Benton H. Calhoun, Rex Min, Alice Wang, Nathan Ickes, and A. Chandrakasan.
    "Design Considerations for Next Generation Wireless Power-Aware Microsensor Nodes"(pdf).
    VLSI Design Symposium, 2004.
    


15. B. Calhoun and A. Chandrakasan.
    "Standby Voltage Scaling for Reduced Power"(pdf).
    Custom Integrated Circuits Conference, 2003.
    


16. B.H. Calhoun, F.A. Honore, and A. Chandrakasan.
    "Design Methodology for Fine-Grained Leakage Control in MTCMOS"(pdf).
    International Symposium on Low Power Electronics and Design, 2003.
    


17. P. Sotiriadis, O. Franza, D.W. Bailey, B. Calhoun, D. Lin, and A. Chandrakasan.
    "Fast Algorithm for Clock Grid Simulation"(pdf).
    European Solid-State Circuits Conference, 2002.
    


18. E. Shih, B.H. Calhoun, S.H. Cho, and A. Chandrakasan.
    "Energy-Efficient Link Layer for Wireless Microsensor Networks"(pdf).
    Workshop on VLSI, 2001.
    

Theses

1. B.H. Calhoun
   Low Energy Digital Circuit Design Using Sub-threshold Operation.
   Doctoral Dissertation, Massachusetts Institute of Technology, 2006.
   


2. B.H. Calhoun
   Circuit Techniques for Subthreshold Leakage Reduction in a Deep Sub-Micron Process
   Master's Thesis, Massachusetts Institute of Technology, 2002.